# Generated by makepkg 6.0.0
# using fakeroot version 1.26
pkgname = vtr
pkgbase = vtr
pkgver = 8.0.0-2
pkgdesc = Verilog to Routing -- Open Source CAD Flow for FPGA Research
url = https://verilogtorouting.org
builddate = 1635889041
packager = Felix Yan <felixonmars@archlinux.org>
size = 16269991
arch = riscv64
license = MIT
depend = ctags
depend = intel-tbb
makedepend = cmake
